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DILL (Digital Logic in LOTOS) is an approach for specifying digital logic circuits and translating them to LOTOS. Circuits are described using the DILL language that builds designs from their constituent components. See the DILL web page for details of publications.
As an example, consider a two-input and gate with one input inverted (i.e. not(x) and y). The DILL description required to define this component is as follows:
divert(-1) include(dill.m4) divert circuit( `NotAnd2 [Ip1, Ip2, Op]', `hide NotIp1 in Inverter [Ip1, NotIp1] |[NotIp1]| And2 [NotIp1, Ip2, Op] where Inverter_Decl And2_Decl')
The divert macro prevents output while the macro library is being processed. The include macro brings in the DILL library. The circuit macro defines the LOTOS functionality of the whole circuit and the LOTOS behaviour expression that comprises it. Declarations from the library are included by giving the component name and the suffix _Decl (declaration). m4 requires macro parameters containing commas to be given in single quotes.
It is strongly recommended to use GNU m4 with DILL since, among other things, it allows a search path to be given for included files. In some other m4 is used, the source DILL file must be in the same directory as the DILL library files.
Suppose that DILL files are given the suffix .dill and that the DILL library is installed in /usr/local/lib/dill. C-shell users could then define the following convenient alias:
alias dill 'm4 -I /usr/local/lib/dill \!:1.dill >! \!:1.lot'
This will make it possible to translate the DILL file myfile.dill to LOTOS with a command like:
dill myfile
Filename | Contents |
---|---|
dill.m4 | the base DILL module |
dill_adder.m4 | adders |
dill_adder_bb.m4 | adders (black-box) |
dill_bit.m4 | bits |
dill_bitarray.m4 | bit arrays |
dill_coder.m4 | encoders and decoders |
dill_coder_wb.m4 | encoders and decoders (white box) |
dill_comparator.m4 | counters |
dill_comparator_bb_wb.m4 | counters (black-box, white box) |
dill_counter.m4 | counters |
dill_counter_bb.m4 | counters (black-box) |
dill_flipflop.m4 | flip-flops |
dill_flipflop_bb.m4 | flip-flops (black-box) |
dill_gate.m4 | 1/2/3/4/8-input logic gates |
dill_gate_tri.m4 | 1/2/3/4/8-input logic gates (tri-state) |
dill_latch.m4 | latches |
dill_latch_bb_wb.m4 | latches (black-box, white box) |
dill_memory.m4 | memory devices |
dill_memory_bb.m4 | memories (black-box) |
dill_multi.m4 | multiple components and wires |
dill_parity.m4 | parity devices |
dill_parity_bb.m4 | parity devices (black-box) |
dill_plexer.m4 | (de)multiplexers |
dill_plexer_bb_wb.m4 | (de)multiplexers (black-box, white box) |
dill_register.m4 | registers |
dill_register_bb.m4 | registers (black-box) |
The following example files are included in subdirectory ex of the distribution:
Filename | Contents |
---|---|
and2.* | two-input "and" |
bits.* | bit operations |
cpu_beha.* | abstract behavioural description of simple CPU |
cpu_gate.* | gate-level description of simple CPU |
cpu_struc.* | intermediate structural description of simple CPU |
decoder2.* | two-input decoder |
gate1.* | all one-input logic gates |
gate2.* | all two-input logic gates |
gates.* | sample logic gates |
keycon.* | matrix keyboard controller |
multis.* | multiple components and wires |
notand.* | "and" gate with one input inverted |
rslatch.* | RS latch |
*.dill | DILL macro input files |
*.sim | definitions for hippo simulator |
*.lot | generated LOTOS files |
Using DILL is reasonably straightforward (provided one knows how to formulate and compose LOTOS processes). However, anyone who wishes to study or modify the library should be warned that the macros are very intricate!
DILL is free software, distributed under the GNU Public License Version 2. You may re-distribute this software provided you preserve this README file. The contents of this package may be used freely for non-commercial purposes provided this README file and copyright notices are retained. Copyright remains with the authors. No warranties are given as to the accuracy or suitability of this package.
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Last Update: 15th July 2006